A matrix-type display device has a display section, a voltage generating circuit, a row electrode driving circuit, and a column electrode driving circuit. The display section has row electrodes and column electrodes which are arranged in a matrix form, and display is executed at points (pixels) at which the row electrodes and the column electrodes intersect each other. The voltage generating circuit is a circuit generating a row voltage for driving the row electrodes and a column voltage for driving the column electrodes. The row electrode driving circuit is a circuit for applying the row voltage outputted by the voltage generating circuit to the row electrodes. The column electrode driving circuit is a circuit for applying the column voltage outputted by the voltage generating circuit to the column electrodes.
Typical of such a matrix-type display device is a matrix-type liquid crystal display device. In the matrix-type liquid crystal display device, the display section is a liquid crystal panel composed of two electrode substrates having electrodes, between which liquid crystal material is sealed. Display is conducted by utilizing optical properties of the liquid crystal which change in response to application of the row voltage and the column voltage to the liquid crystal panel.
Such matrix-type liquid crystal display devices are roughly classified into two groups, (1) active matrix-type devices in which every pixel has an active element for controlling the driving voltage, and (2) simple matrix-type devices which are not equipped with active elements. The active matrix-type devices are incapable of display on large screens with high precision due to their complex structures. Further, their manufacturing costs are high. On the other hand, the simple matrix-type devices are capable of display on large screens and their manufacturing costs are relatively low, since their structures are simple.
As to a driving method for the simple matrix-type display devices, there are, for example, driving methods disclosed by (1) the Japanese Publication of Laid-Open Patent Application No. 6-19428/1994 (Tokukaihei 6-19428) and (2) the Japanese Publication of Laid-Open Patent Application No. 7-56538/1995 (Tokukaihei 7-56538).
The driving method disclosed by the publication (1) is characterized in that fluctuation of the row voltage is corrected by superimposing onto the row voltage a voltage in accordance with an effective application voltage, so as to suppress crosstalks which is recognized as a display irregularity. On the other hand, the driving method disclosed by the publication (2) is characterized in taking an amplitude modulation method in order to carry out gradation display.
Voltage generating circuits as disclosed by the publications (1) and (2) are arranged, for example, as shown in FIG. 11. The arrangement shown in FIG. 11 is an arrangement of a row voltage generating circuit in the case where a row voltage amplitude modulation method is applied.
In the row voltage generating circuit, a potential difference between reference potentials V.sub.EE and V.sub.SS is divided by a plurality of voltage dividing resistors R.sub.101 through R.sub.106, so that voltages at a plurality of levels are obtained. These voltages are subjected to impedance conversion by operational amplifiers 101 through 105, and are switched by analog switches. Here, the analog switches are composed of p-channel MOSFETs 111 and 113, and n-channel MOSFETs 112 and 114, respectively, where MOSFET stands for metal oxide semiconductor-type field effect transistor.
Control signals which have been subjected to level conversion by level shifters 121 and 122 are supplied to gates of the p-channel MOSFET 111 and the n-channel MOSFET 112, respectively. On the other hand, control signals (reversed by an inverter 131) which have been subjected to level conversion by level shifters 123 and 124 are supplied to gates of the p-channel MOSFET 113 and the n-channel MOSFET 114, respectively. Therefore, voltages supplied to the row electrode driving circuit (not shown) are switched in accordance with a logic level of the control signal, between a group of output voltages from the operational amplifiers 101, 103, and 105, and a group of output voltages from the operational amplifiers 102, 103, and 104.
Here, power source voltages V.sub.101 through V.sub.110 are supplied to the operational amplifiers 101 through 105. The analog switches are composed of the MOSFET 111 through 114, respectively, but they may be composed of bipolar transistors instead.
Incidentally, in the simple matrix-type liquid crystal display device as described above, the row electrodes and the column electrodes are usually driven by the amplitude selective addressing scheme, the plural-row simultaneous selection driving scheme, or the like. The amplitude selective addressing scheme is disclosed by, for example, "Ekisho no Saishin Gijutsu (Most Up-to-date Technology of Liquid Crystal)", p.106, published by Kogyo Chosa-kai Shuppan (Industry Research Institute Publishing Association). The plural-row simultaneous selection driving scheme is disclosed by, for example, T. N. Ruckmongathan, Conf. Record of 1988 International Display Research Conference, p.80 (1988), T. J. Scheffer and B. Clifton, 1992 SID Digest of Technical Papers XXIII, p.228 (1992), and S. Ihara et al., 1992 SID Digest of Technical Papers XXIII, p.232 (1992).
The amplitude selective addressing scheme and the plural-row simultaneous selection driving scheme are driving schemes based on the following basic principle: the row voltage waveform is expressed by an orthogonal matrix such as a unit matrix or a Walsh matrix, while the column voltage waveform is determined by orthogonal conversion of display information by the orthogonal matrix, and on the display panel, display is carried out by reverse conversion of the column voltage waveform into display information.
According to the basic principle, irrelevant to the display information, a constant effective voltage is applied to each pixel of non-selected rows, whose matrix elements of an orthogonal matrix correspond to 0. On the other hand, effective voltages in accordance with the display information are applied to pixels of the rows other than the non-selected rows.
According to the above-described basic principle, if the number of plural rows simultaneously selected is N (N=1 in the case of the amplitude selective addressing scheme), voltages at three levels, that is, positive and negative selective voltages and a non-selective voltage, are necessary as row voltages, while voltages at (N+1) levels are necessary as column voltages. Besides, in the case where either of the driving methods disclosed by the publications (1) and (2) is applied, the necessary voltage levels increase, since additional potentials for suppression of crosstalk, gradation display, and the like are necessary.
Such an increase in the number of the voltage levels causes the circuitry scale to expand, thereby bringing about a rise of prices of liquid crystal display devices, and an increase in power consumption. For example, in the aforementioned voltage generating circuit, more operational amplifiers for the impedance conversion are necessary in addition to the operational amplifiers 101 through 105, so as to correspond to all voltage levels necessary for voltage switching, and the number of the analog switches also has to be increased to substantially the same number.